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PI74ALVCH16374
16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs
Product Features
* * * * * * * * PI74ALVCH16374 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25C Bus Hold retains last active bus state during 3-STATE eliminating the need for external pullup resistors Industrial operation at 40C to +85C Packages available: 48-pin 240 mil wide plastic TSSOP (A) 48-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are produced in the Companys advanced 0.5 micron CMOS technology, achieving industry leading speed. This 16-bit edge-triggered D-type flip-flop is designed for 2.3V to 3.6V VCC operation. The PI74ALVCH16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the Clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs. OE can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a highimpedance state. In that state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
C1
2
Logic Block Diagram
1OE
1
1CLK
48
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
1Q1
1D1
47
1D
To Seven Other Channels
24
2OE 2CLK
25
C1
13
2Q1
2D1
36
1D
To Seven Other Channels
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PS8138A 09/03/98
Product Pin Description
Pin Name OE CLK Dx Qx GND VCC Description Output Enable Input (Active LOW) Clock Input (Active HIGH) Data Inputs 3-State Outputs Ground Power
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PI74ALVCH16374 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs
Truth Table(1)
Inputs OE L L L H CLK H or L X D H L X X Outputs Q H L Q0 Z
Product Pin Configuration
Notes: 1. H = High Signal Level L = Low Signal Level X = Irrelevant Z = High Impedance = LOW to HIGH Transition n = 1,2
1OE 1Q1 1Q2 GND 1Q3 1Q4 VCC 1Q5 1Q6 GND 1Q7 1Q8 2Q1 2Q2 GND 2Q3 2Q4 VCC 2Q5 2Q6 GND 2Q7 2Q8 2OE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44
1CLK 1D1 1D2 GND 1D3 1D4 VCC 1D5 1D6 GND 1D7 1D8 2D1 2D2 GND 2D3 2D4 VCC 2D5 2D6 GND 2D7 2D8 2CLK
48-PIN V48 A48
43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16374 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................ 65C to +150C Ambient Temperature with Power Applied .......................... 40C to +85C Input Voltage Range, VIN .................................................... 0.5V to VCC +0.5V Output Voltage Range, VOUT ............................................. 0.5V to VCC +0.5V DC Input Voltage ................................................................... 0.5V to +5.0V DC Output Current .............................................................................. 100 mA Power Dissipation ................................................................................... 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40C to +85C, VCC = 3.3V 10%)
Parame te rs VCC VIH(3) VIL(3) VIN(3) VOUT(3) D e s cription Supply Voltage Input HIGH Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V 0 0 IOH = - 100mA, VCC = Min. to Max. O utput HIGH Voltage VIH = 1.7V, IOH = - 6mA, VCC = 2.3V VIH = 1.7V, IOH = - 12mA, VCC = 2.3V VIH = 2.0V, IOH = - 12mA, VCC = 2.7V VIH = 2.0V, IOH = - 12mA, VCC = 3.0V VIH = 2.0V, IOH = - 24mA, VCC = 3.0V IOL = 100mA, VIL = Min. to Max. VOL O utput LO W Voltage VIL = 0.7V, IOL = 6mA, VCC = 2.3V VIL = 0.7V, IOL = 12mA, VCC = 2.3V VIL = 0.8V, IOL = 12mA, VCC = 2.7V VIL = 0.8V, IOL = 24mA, VCC = 3.0V O utput HIGH Current VCC = 2.3V VCC = 2.7V VCC = 3.0V VCC = 2.3V VCC = 2.7V VCC = 3.0V
3
Te s t Conditions (1)
M in. 2.3 1.7 2.0
Typ.(2)
M ax. 3.6
Units
Input LO W Voltage Input Voltage O utput Voltage
0.7 0.8 VCC VCC
VCC - 0.2 2.0 1.7 2.2 2.4 2.0 0.2 0.4 0.7 0.4 0.55 - 12 - 12 - 24 12 12 24
PS8138A 09/03/98
V
VOH
IOH(3)
mA
IOL(3)
O utput LO W Current
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PI74ALVCH16374 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs
DC Electrical Characteristics-Continued (Over the Operating Range, TA = 40C to +85C, VCC = 3.3V 10%)
Parame te rs De s cription IIN Input Current Te s t Conditions (1) VIN = VCC or GND, VCC = 3.6V VIN = 0.7V, VCC = 2.3V IIN (HOLD) Input Hold Current VIN = 1.7V, VCC = 2.3V VIN = 0.8V, VCC = 3.0V VIN = 2.0V, VCC = 3.0V VIN = 0 to 3.6V, VCC = 3.6V IOZ ICC DICC Output Current (3- STATE Outputs) Supply Current Supply Current per Input @ TTL HIGH Control Inputs Data Inputs Outputs VOUT = VCC or GND, VCC = 3.6V VCC = 3.6V, IOUT = 0mA, VIN = GND or VCC VCC = 3.0V to 3.6V One Input at VCC - 0.6V Other Inputs at VCC or GND VIN = VCC or GND, VCC = 3.3V VO = VCC or GND, VCC = 3.3V 3 6 7 pF 45 - 45 75 - 75 500 10 40 750 mA M in. Typ.(2) M ax. 5 Units
CI CO
Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient and maximum loading. 3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
Timing Requirements over Operating Range
Parame te rs fCLOCK tW tSU tH Dt/Dv(1) De s cription Clock Frequency Pulse Duration CLK HIGH or LOW Setup Time Data Before CLK Hold Time Data After CLK Input Transition Rise or Fall VCC = 2.5V 0.2V M in. 0 3.3 2.1 0.6 M ax. 150 VCC = 2.7V M in. 0 3.3 2.2 0.5 M ax. 150 VCC = 3.3V 0.3V M in. 0 3.3 1.9 0.5 ns/V ns M ax. 150 Units MHz
Note: 1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
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PS8138A 09/03/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16374 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs
Switching Characteristics over Operating Range(1)
Parame te rs fMAX tPD tEN tDIS CLK OE OE Q From (INPUT) To (OUTPUT) VCC = 2.5V 0.2V M in.(2) 150 1.0 1.0 1.7 5.3 6.2 5.3 M ax. VCC = 2.7V M in. 150 4.9 5.9 4.7 M ax. VCC = 3.3V 0.3V M in.(2) 150 1.0 1.0 1.0 4.2 4.8 4.3 ns M ax. Units MHz
Notes: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, TA = 25C
Parame te r CPD Power Dissipation Capacitance Outputs Enabled Outputs Disabled Te s t Conditions VCC = 2.5V 0.2V Typ. 31 16 30 18 VCC = 3.3V 0.3V Units
CL = 50pF, f = 10 MHz
pF
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
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PS8138A 09/03/98

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